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fn4914 rev 6.00 page 1 of 13 august 21, 2015 fn4914 rev 6.00 august 21, 2015 ICL3207E, icl3217e +/- 15kv esd protected, +3v to +5.5v, low power, 250kbps, rs-23 2 transmitters/receivers datasheet the intersil icl32x7e devices are 3v to 5.5v powered rs-232 transmitters (five)/receivers (three) which meet ela/tia-232 and v.28/v.24 specifications, even at v cc = 3.0v. additionally, they provide ? 15kv esd protection (iec61000-4-2 air gap) and ? 15kv human body model protection on transmitter outputs and receiver inputs (rs-232 pins). targeted applications are isdn terminal adaptors, pdas, palmtops, peripherals, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. the icl3217e?s efficient on-chip charge pumps, coupled with an automatic powerdown function, reduces the standby supply current to a 1 ? a trickle. small footprint packaging, and the use of small, low value capacitors ens ure board space savings as well. data rates greater t han 250kbps are guaranteed at worst case load conditions. this family is fully compatible with 3.3v-only systems, mixed 3.3v and 5v systems, and 5v-only systems, and is a lower power, pin-for-pin replacement for ?207e and ?237e type devices. the icl3217e features an automatic powerdown function which powers down the on-chip power-supply and driver circuits. this occurs when an attached peripheral device is shut off or the rs-232 cable is removed, conserving system power automatically, without changes to the hardware or operating system. the icl3217e powers up again when a valid rs-232 voltage is applied to any receiver input. table 1 summarizes the features of the devices represented by this data sheet, while application note an9863 summarizes the features of ea ch device comprising the icl32xxe 3v family. features ? pb-free available as an option (see ordering info) ? esd protection for rs-232 i/o pins to ? 15kv (iec61000) ? 5v lower power replacement for max207e, hin207e, hin237e ? meets eia/tia-232 and v.28/v .24 specifications at 3v ? latch-up free ? on-chip voltage converters require only four external 0.1 ? f capacitors ? rs-232 compatible with v cc = 2.7v ? automatic powerdown (i cc = 1 ? a, icl3217e only) ? receiver hysteresis for improved noise immunity ? guaranteed minimum data rate . . . . . . . . . . . . . 250kbps ? guaranteed minimum slew rate . . . . . . . . . . . . . . . 6v/ ? s ? wide power supply range . . . . . . . single +3v to +5.5v applications ? battery powered, hand-hel d, and portable equipment ? laptop computers, notebooks, palmtops ? modems, printers and other peripherals ? isdn terminal adaptors and set top boxes ? related literature - technical brief tb363, guidelines for handling and processing moisture sensitive surface mount devices (smds) pinout ICL3207E, icl3217e (soic, ssop) top view t3 out t1 out t2 out r1 in r1 out t2 in t1 in gnd v cc c1+ v+ c1- t4 out r2 out t5 in t5 out t4 in r3 out v- c2- c2+ r2 in t3 in r3 in 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 21 22 23 24 15 14 13 table 1. summary of features part number no. of tx no. of rx no. of monitor rx (r outb ) data rate (kbps) rx enable function? manual power- down? automatic powerdown function? ICL3207E 5 3 0 250 no no no icl3217e (no longer available or supported) 5 3 0 250 no no yes
ICL3207E, icl3217e fn4914 rev 6.00 page 2 of 13 august 21, 2015 pin descriptions pin function v cc system power supply input (3.0v to 5.5v). v+ internally generated positive transmitter supply (+5.5v). v- internally generated negative transmitter supply (-5.5v). gnd ground connection. c1+ external capacitor (voltage doubler) is connected to this lead. c1- external capacitor (voltage doubler) is connected to this lead. c2+ external capacitor (voltage inverter) is connected to this lead. c2- external capacitor (voltage inverter) is connected to this lead. t in ttl/cmos compatible transmitter inputs. t out ? 15kv esd protected , rs-232 level (nominally ? 5.5v) transmitter outputs. r in ? 15kv esd protected , rs-232 compatible receiver inputs. r out ttl/cmos level receiver outputs. ordering information part number (notes 1, 2) temp. range (c) package (rohs compliant) pkg. dwg. # ICL3207Ecaz 0 to 70 24 ld ssop m24.209 ICL3207Ecbz 0 to 70 24 ld soic m24.3 icl3217ecaz (no longer available, recommended replacement: icl3238ecaz) 0 to 70 24 ld ssop m24.209 icl3217ecbz (no longer available, recommended replacement: icl3238ecaz) 0 to 70 24 ld soic m24.3 icl3217eiaz (no longer available, recommended replacement: icl3238ecaz) -40 to 85 24 ld ssop m24.209 icl3217eibz (no longer available, recommended replacement: icl3238ecaz) -40 to 85 24 ld soic m24.3 notes: 1. most surface mount devices are avail able on tape and reel; add ?-t? to suffix. 2. intersil pb-free products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plat e termination finish, which is compatible with both snpb and pb-free solderin g operations. intersil pb-free products are msl classified at p b-free peak reflow temperatures that meet or exceed the pb-free requirements of ip c/jedec j std-020b.
ICL3207E, icl3217e fn4914 rev 6.00 page 3 of 13 august 21, 2015 typical operating circuit icl32x7e 9 v cc t1 out t2 out t3 out t1 in t2 in t3 in t 1 t 2 t 3 + + 7 6 2 3 18 1 10 12 11 15 v+ v- c1+ c1- c2+ c2- + 13 14 r1 out r1 in 4 5k ? r2 out r2 in 23 22 5k ? r3 out r3 in 16 17 5k ? 5 c 1 ? c 2 ? + c 3 ? c 4 ? gnd v cc ? + 0.1 ? f 8 ttl/cmos logic levels rs-232 levels rs-232 levels r 1 r 2 r 3 t4 out t5 out t4 in t5 in t 5 19 24 21 20 t 4 ? - for v cc = 3.3v, c 1 - c 4 = 0.1 ? f or 0.22 ? f for v cc = 5v, c 1 - c 4 = 0.1 ? f or 1 ? f + c 3 (optional connection)
ICL3207E, icl3217e fn4914 rev 6.00 page 4 of 13 august 21, 2015 absolute maximum ratings thermal information v cc to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v v+ to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v v- to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3v to -7v v+ to v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? 25v output voltages t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? 13.2v r out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to v cc + 0.3v short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous esd rating . . . . . . . . . . . . . . . . . . . . . . . . see specification table thermal resistance (typical, note 3) ? ja (?/w) 24 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 75 24 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . 100 maximum junction temperature (plastic package) . . . . . . . 150c maximum storage temperature range . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c (lead tips only) operating conditions temperature range icl32x7ecx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0c to 70c icl32x7eix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40c to 85c caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 3. ? ja is measured with the component mounted on a low effective ther mal conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1 ? f; unless otherwise specified. typicals are at t a = 25c parameter test conditions temp (c) min typ max units dc characteristics supply current, automatic powerdown all r in open (icl3217e only) 25 - 1.0 10 ? a supply current, automatic powerdown disabled all outputs unloaded 25 - 0.3 1.0 ma transmitter inputs and receiver outputs input logic threshold low t in full - - 0.8 v input logic threshold high t in v cc = 3.3v full 2.0 - - v v cc = 5.0v full 2.4 - - v input leakage current t in full - ? 0.01 ? 1.0 ? a output leakage current (icl3217e only) full - ? 0.05 ? 10 ? a output voltage low i out = 1.6ma full - - 0.4 v output voltage high i out = -1.0ma full v cc -0.6 v cc -0.1 - v automatic powerdown (icl3217e only) receiver input thresholds to enable transmitters icl3217e powers up (figure 4) full -2.7 - 2.7 v receiver input thresholds to disable transmitters icl3217e powers down (figure 4) full -0.3 - 0.3 v receiver threshold to transmitters enabled delay (t wu ) 25 - 100 - ? s receiver positive or negative threshold to transmitters disabled delay 25 - 30 - ? s receiver inputs input voltage range full -25 - 25 v input threshold low v cc = 3.3v 25 0.6 1.2 - v v cc = 5.0v 25 0.8 1.5 - v input threshold high v cc = 3.3v 25 - 1.5 2.4 v v cc = 5.0v 25 - 1.8 2.4 v
ICL3207E, icl3217e fn4914 rev 6.00 page 5 of 13 august 21, 2015 detailed description the icl32x7e interface ics operate from a single +3v to +5.5v power supply, guarantee a 250kbps minimum data rate, require only four small external 0.1 ? f capacitors, feature low power consumption, and meet all ela rs-232c and v.28 specifications. the circuit is divi ded into three sections: charge pump, transmitters and receivers. charge-pump intersil?s new icl32xxe family ut ilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ? 5.5v transmitter supplies from a v cc supply as low as 3v. this allows these device s to maintain rs-232 compliant output levels over the ? 10% tolerance range of 3.3v powered systems. the efficient on-chip power supplies require only four small, external 0.1 ? f capacitors for the voltage doubler and inverter functions at v cc = 3.3v. see the capacitor selection section, and table 3 for capaci tor recommendations for other operating conditions. the charge pumps operate discontinuously (i.e., they turn off as soon as the v+ and v- supplies are pumped up to the nominal values), resulting in significant power savings. transmitters the transmitters are proprietary, low dropout, inverting drivers that translate ttl/cm os inputs to eia/tia-232 output levels. coupled with the on-chip ? 5.5v supplies, these transmitters deliver true rs-232 levels over a wide range of single supply system voltages. icl3217e transmitter outputs disable and assume a high impedance state when the de vice enters the automatic powerdown mode. these outputs may be driven to ? 12v when disabled. both devices guarantee a 250kbps data rate for full load conditions (3k ? and 1000pf), v cc ? 3.0v, with one transmitter operating at full speed. under more typical conditions of v cc ? 3.3v, r l =3k ? , and c l = 250pf, one transmitter easily operates at 800kbps. transmitter inputs float if left unconnected, and may cause i cc increases. connect unused inputs to gnd for the best performance. input hysteresis 25 - 0.3 - v input resistance 25357k ? transmitter outputs output voltage swing all transmitter outputs loaded with 3k ? to ground full ? 5.0 ? 5.4 - v output resistance v cc = v+ = v- = 0v, transmitter output = ? 2v full 300 10m - ? output short-circuit current full - ? 35 ? 60 ma output leakage current (icl3217e only) v out = ?? 12v, v cc = 0v or 3v to 5.5v in automatic powerdown full - - ? 25 ? a timing characteristics maximum data rate (one transmitter switching) v cc = 3.15v, c 1 - c 4 = 0.1 ? f, r l = 3k ??? c l = 1000pf full 250 500 - kbps v cc = 3.0v, c 1 - c 4 = 0.22 ? f, r l = 3k ??? c l = 1000pf full 250 286 - kbps v cc ? 4.5v, c 1 - c 4 = 0.1 ? f, r l = 3k ??? c l = 1000pf full 250 310 - kbps receiver propagation delay receiver input to receiver output, c l = 150pf t phl 25 - 0.3 - ? s t plh 25 - 0.3 - ? s transmitter skew t phl - t plh full - 200 1000 ns receiver skew t phl - t plh full - 100 500 ns transition region slew rate v cc = 3.3v, r l = 3k ?? to 7k ?? measured from +3v to -3v or -3v to +3v c l = 200pf to 2500pf 25 4 15 30 v/ ? s c l = 200pf to 1000pf 25 6 15 30 v/ ? s esd performance rs-232 pins (t out , r in ) iec61000-4-2, air-gap discharge method 25 - ? 15 - kv iec61000-4-2, contact discharge method 25 - ? 8-kv human body model 25 - ? 15 - kv all other pins human body model 25 - ? 2-kv electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1 ? f; unless otherwise specified. typicals are at t a = 25c (continued) parameter test conditions temp (c) min typ max units
ICL3207E, icl3217e fn4914 rev 6.00 page 6 of 13 august 21, 2015 receivers the icl32x7e each contain inverting receivers that convert rs-232 signals to cmos output levels and accept inputs up to ? 25v while presenting the required 3k ? to 7k ? input impedance (see figure 1) even if the power is off (v cc =0v). the receivers? schmitt trigger in put stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. receivers on the ICL3207E are always active. the icl3217e receivers disable when in t he automatic pow erdown state, thereby eliminating the possible current path through a shutdown peripheral?s input prot ection diode (see figures 2 and 3). low power operation these 3v devices require a nomin al supply current of 0.3ma, even at v cc = 5.5v, during normal operation (not in powerdown mode). this is cons iderably less than the 11ma current required by comparable 5v rs-232 devices, allowing users to reduce system power simp ly by replacing the old style device with the ICL3207E. low power, pin compatible replacement pin compatibility with existing 5v products (e.g., max207e), coupled with the wide operating supply range, make the icl32x7e potential lower power, higher performance drop-in replacements for existing ?2x7e 5v applications. as long as the ? 5v rs-232 output swings are acceptable, the icl32x7e devices should work in most 5v applications. when replacing a ?207e or ?237e device in an existing 5v application, it is acceptable to terminate c 3 to v cc as shown on the typical operating circuit . nevertheless, terminate c 3 to gnd if possible, as slightly bette r performance results from this configuration. automatic powerdown (icl3217e only) even greater power savings is available by using the icl3217e which features an automatic powerdown function. when no valid rs-232 voltages (see figure 4) are sensed on any receiver input for 30 ? s, the icl3217e automatically enters its powerdown state (see figure 5). in powerdown, supply current drops to 1 ? a, because the on-chip charge pump turns off (v+ collapses to v cc , v- collapses to gnd), and the receiver and transmitter outputs three-state (see table 2). this micro-power mode makes the icl3217e ideal for battery powered and portable applicati ons. invalid receiver levels occur whenever the driving perip heral?s outputs are shut off (powered down) or when the rs-232 interface cable is disconnected. the icl3217e powers back up whenever it detects a valid rs-232 voltage level on any receiver input (such as when the rs-232 cable is reconnected). the time to recover from automatic powerdown mode is typically 100 ? s. r xout gnd ? v rout ? v cc 5k ? r xin -25v ? v rin ? +25v gnd v cc figure 1. inverting receiver connections figure 2. power drain through powered down peripheral old v cc powered gnd v cc rx tx v cc current flow v out = v cc rs-232 chip down uart shdn = gnd table 2. icl3217e automatic powerdown operation rs-232 signal present at receiver input? transmitter outputs receiver outputs mode of operation yes active active normal operation no high-z high-z powerdown due to auto powerdown logic figure 3. disabled receivers prevent power drain icl3217e transition detector r x t x v cc v cc to v out = hi-z* wake-up logic powered down uart v- * in automatic powerdown
ICL3207E, icl3217e fn4914 rev 6.00 page 7 of 13 august 21, 2015 this automatic powerdown feat ure provides add itional system power savings without changes to the existing operating system or hardware. utilizing power management circuitr y, to power down the rest of the communication circuitry (e.g., the uart) when the icl3217e powers down, produces even greater power savings. connecting a transition detector to the v- pin (see figure 3) is an easy way for the power management logic to determine when the icl3217e enters and exits powerdown. capacitor selection the charge pumps require 0.1 ? f, or greater, capacitors for 3.3v operation. with 0.1 ? f capacitors, five percent tolerance supplies (e.g., 3.14v mini mum) deliver greater than ? 5v transmitter swings at full data rate, while ten percent tolerance supplies (e.g., 2.97v minimum) deliver ? 4.95v transmitter swings. if greater than ? 5v transmitter swings are required with a 10% tolerance 3.3v supply, 0.22 ? f capacitors are recommended (see table 3). existing 5v applications typically utilize either 0.1 ? f or 1 ? f capacitors, and the icl32x7e works well with either value. new 5v designs should use 0.22 ? f capacitors for the best results. for other supply voltages refer to table 3 for capacitor values. do not use values smaller than those listed in table 3. increasi ng the capacitor values (by a factor of two) reduces ripple on the transmitter outputs and slightly reduces power consumption. c 2 , c 3 , and c 4 can be increased without increasing c 1 ?s value, however, do not increase c 1 without also increasing c 2 , c 3 , and c 4 to maintain the proper ratios (c 1 to the other capacitors). when using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. if in doubt, use ca pacitors with a larger nominal value. the capacitor?s equivalent series resistance (esr) usually rises at low temperatures and it influences the amount of ripple on v+ and v- . power supply decoupling in most circumstances a 0.1 ? f bypass capacitor is adequate. in applications that are particula rly sensitive to power supply noise, decouple v cc to ground with a capacitor of the same value as the charge-pump capacitor c 1 . connect the bypass capacitor as close as possible to the ic. transmitter outputs when exiting powerdown figure 6 shows the response of two icl3217e transmitter outputs when exiting powerdown mode. as they activate, the two transmitter outputs properly go to opposite rs-232 levels, with no glitching, ringing, nor undesirable transients. each transmitter is loaded with 3k ?? in parallel with 2500pf. note that the transmitters enable only when the magnitude of the supplies exceed approximately 3v. . figure 4. definition of valid rs-232 receiver levels 0.3v -0.3v -2.7v 2.7v invalid level - powe rdown occurs after 30 ? s valid rs-232 level - icl3217e is active valid rs-232 level - icl3217e is active indeterminate - powerdown may or may not occur indeterminate - powerdown may or may not occur receiver inputs transmitter outputs v+ v cc 0 v- invalid region } figure 5. automatic powerdown timing diagram autopwdn pwr up (t wu ) table 3. required capacitor values v cc (v) c 1 ( ? f) c 2 , c 3 , c 4 ( ? f) 3.15 to 3.6 0.1 0.1 3.0 to 3.6 0.22 0.22 4.5 to 5.5 0.1 to 1.0 0.1 to 1.0 3.0 to 5.5 0.22 0.22 time (20 ? s/div.) t1 t2 2v/div 5v/div v cc = +3.3v c1 - c4 = 0.1 ? f rx in figure 6. transmitter outputs when exiting powerdown (icl3217e only)
ICL3207E, icl3217e fn4914 rev 6.00 page 8 of 13 august 21, 2015 operation down to 2.7v icl32x7e transmitter outputs meet rs-562 levels ( ? 3.7v) with v cc as low as 2.7v. rs-562 levels typically ensure inter operability with rs-232 devices. high data rates the icl32xx maintain the rs-232 ? 5v minimum transmitter output voltages even at high data rates. figure 7 details a transmitter loopback test circuit, and figure 8 illustrates the loopback test result at 120kbps. for this test, all transmitters were simultaneously driving rs-232 loads in parallel with 1000pf, at 120kbps. figure 9 shows the loopback results for a single transmitter driving 1000pf and an rs-232 load at 250kbps. the static transmitters were also loaded with an rs-232 receiver. interconnection with 3v and 5v logic the icl32x7e directly interface with 5v cmos and ttl logic families. nevertheless, with the icl32x7e at 3.3v, and the logic supply at 5v, ac, hc, and cd4000 outputs can drive icl32x7e inputs, but ic l32x7e outputs do not reach the minimum v ih for these logic families. see table 4 for more information. ? 15kv esd protection all pins on icl32xx devices include esd protection structures, but the icl32x7 e incorporate advanced structures which allow the rs -232 pins (transmitter outputs and receiver inputs) to survive esd events up to ? 15kv. the rs-232 pins are particularly vulnerable to esd damage because they typically connect to an exposed port on the exterior of the finished product. simply touching the port pins, or connecting a cable, can cause an esd event that might destroy unprotected ics. these new esd structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don?t interfere with rs-232 signals as large as ? 25v. figure 7. transmitter loopback test circuit figure 8. loopback test at 120kbps icl32x7e c 1 c 2 c 4 c 3 + + + + 1000pf v+ v- 5k t in r out c1+ c1- c2+ c2- r in t out + v cc 0.1 ? f v cc t1 in t1 out r1 out 5 ? s/div. v cc = +3.3v 5v/div. c1 - c4 = 0.1 ? f figure 9. loopback test at 250kbps table 4. logic family compatibility with various supply voltages system power-supply voltage (v) v cc supply voltage (v) compatibility 3.3 3.3 compatible with all cmos families. 5 5 compatible with all ttl and cmos logic families. 5 3.3 compatible with act and hct cmos, and with ttl. icl32x7 e outputs are incompatible with ac, hc, and cd4000 cmos inputs. t1 in t1 out r1 out 2 ? s/div. 5v/div. v cc = +3.3v c1 - c4 = 0.1mf
ICL3207E, icl3217e fn4914 rev 6.00 page 9 of 13 august 21, 2015 human body mode l (hbm) testing as the name implies, this test method emulates the esd event delivered to an ic during human handling. the tester delivers the charge through a 1.5k ? current limiting resistor, making the test less severe than the iec61000 test which utilizes a 330 ? limiting resistor. the hbm method determines an ics ability to withstand the esd transients ty pically present during handling and manufacturing. due to the random nature of these events, each pin is tested with respect to all other pins. the rs-232 pins on ?e? family devices can withstand hbm esd events to ? 15kv. iec61000-4-2 testing the iec61000 test method applies to finished equipment, rather than to an individual ic. therefore, the pins most likely to suffer an esd event are th ose that are exposed to the outside world (the rs-232 pins in this case), and the ic is tested in its typical applicati on configuration (power applied) rather than testing each pin-to-pin combination. the lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the hbm test. the extra esd protection built into this device?s rs-232 pins allows the design of equi pment meeting level 4 criteria without the need for additional board level protection on the rs-232 port. air-gap discharg e test method for this test method, a charged probe tip moves toward the ic pin until the voltage arcs to it. the current waveform delivered to the ic pin depends on approach speed, humidity, temperature, etc., so it is difficu lt to obtain repeatable results. the ?e? device rs-232 pins withstand ? 15kv air-gap discharges. contact discharge test method during the contact discharge te st, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. the result is a more repeatable and predic table test, but equipment limits prevent testing devices at voltages higher than ? 8kv. all ?e? family devices survive ? 8kv contact discharges on the rs-232 pins. typical performance curves v cc = 3.3v, t a = 25c figure 10. transmitter output voltage vs load capacitance figure 11. slew rate vs load capacitance -6.0 -4.0 -2.0 0 2.0 4.0 6.0 1000 2000 3000 4000 5000 0 load capacitance (pf) transmitter output voltage (v) 1 transmitter at 250kbps v out + v out - other transmitters at 30kbps load capacitance (pf) slew rate (v/ ? s) 0 1000 2000 3000 4000 5000 5 10 15 20 25 +slew -slew -slew
ICL3207E, icl3217e fn4914 rev 6.00 page 10 of 13 august 21, 2015 die characteristics substrate potentia l (powered up): gnd transistor count: ICL3207E: 469 icl3217e: 488 process: si gate cmos figure 12. supply current vs load capacitance when transmitting data figure 13. supply current vs supply voltage typical performance curves v cc = 3.3v, t a = 25c (continued) 50 55 15 20 25 30 45 35 40 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps 1 transmitter switching supply current (ma) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 0.5 1.0 1.5 2.0 supply voltage (v) 2.5 3.0 3.5 no load all outputs static
fn4914 rev 6.00 page 11 of 13 august 21, 2015 ICL3207E, icl3217e intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2000-2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's product s address some of the largest markets within the industrial and in frastructure, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentation and related parts , please see the respective product information page found at www.intersil.com . you may report errors or suggestions fo r improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o the web to make sure that you have the latest revision. date revision change august 21, 2015 fn4914.6 updated ordering information table on page 2. added revision history and about intersil sections. updated package outline drawing m24.3 to the latest revision updates are as follows: -revision 0 to revision 1, remove d symbol which is overlapping the alpha symbol in the diagram. -revision 1 to revision 2, updated to new pod standar d by removing table listing dimensions and putting dimensions on drawing. added land pattern.
ICL3207E, icl3217e fn4914 rev 6.00 page 12 of 13 august 21, 2015 shrink small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimen- sion at maximum material condition. 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m ? 0.25 0.010 gauge plane a2 m24.209 (jedec mo-150-ag issue b) 24 lead shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.078 - 2.00 - a1 0.002 - 0.05 - - a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.312 0.334 7.90 8.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n24 247 ? 0 o 8 o 0 o 8 o - rev. 1 3/95
ICL3207E, icl3217e fn4914 rev 6.00 page 13 of 13 august 21, 2015 package outline drawing m24.3 24 lead wide body small outline plastic package (soic) rev 2, 3/11 top view notes: 1. dimensioning and tolerancing per ansi y14.5m-1982. 2. package length does not include mold flash, protrusions or ga te burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. package width does not include interlead flash or protrusions . interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 5. terminal numbers are shown for reference only. 6. the lead width as measured 0.36mm (0.014 inch) or greater abo ve the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. controlling dimension: millimete r. converted inch dimensions i n ( ) are not necessarily exact. 8. this outline conforms to jede c publication ms-013-ad issue c . side view a side view b typical recommended land pattern index area 24 123 seating plane detail "a" x 45 7.60 (0.299) 7.40 (0.291) 0.75 (0.029) 0.25 (0.010) 10.65 (0.419) 10.00 (0.394) 1.27 (0.050) 0.40 (0.016) 15.60 (0.614) 15.20 (0.598) 2.65 (0.104) 2.35 (0.093) 0.30 (0.012) 0.10 (0.004) 1.27 (0.050) 0.51 (0.020) 0.33 (0.013) 0.32 (0.012) 0.23 (0.009) 8 0 1.981 (0.078) 9.373 (0.369) 0.533 (0.021) 1.27 (0.050)

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